|
|
SDR DRAM |
DDR SDRAM |
DDR2 SDRAM |
DDR3 SDRAM |
|
Data Rate(Mb/s per pin) |
66 ~ 133 |
200 ~ 400 |
400 ~ 800 |
800 ~ 1600 |
|
I/O Organization |
x4 , x8 , x16 |
x4, x8, x16 |
x4, x8, x16 |
x4, x8, x16 |
|
Voltage |
3.3V |
2.5V |
1.8V |
1.5V |
|
Interface |
LVTTL |
SSTL_2 |
SSTL_18 |
SSTL_15 |
|
No. of Banks |
2/4 |
4 |
4/8 |
8/Chop 4 |
|
Prefetch |
1Bit |
2Bit |
4Bit |
8Bit |
|
Burst Length |
1,2,4,8 Page |
2,4,8 Page |
4,8 Page |
8 Page |
|
Bidirectional Strobe |
None |
Single Ended |
Single Ended and Differential |
Differential Only |
|
DQ Driver Stremgth |
Wide Envelope |
Narrow Envelope |
OCD Calibration |
ZQ-Pin Calibration |
|
Termination |
- |
On board |
On board/ODT |
DIMM/Dynamic ODT |
|
Read Latency |
CL = 1,2,3 |
CL = 1.5,2,2.5,3 |
CL = 2,3,4,5 |
CL = 5,6,7,8,9,10,11 |
|
Additional Latency |
- |
- |
AL = 0,1,2,3,4 |
AL = 0, CL-1, CL-2 |
|
Write Latency |
0 |
1 |
CL-1 |
5,6,7,8 + AL |
|
Interruptes |
Yes |
Yes |
Wr-Wr, Rd-Rd 4n only |
Burst Chop forRd and Wr |
微信公众平台
